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256Mb, 512Mb, 1Gb, 2Gb: 3V Embedded Parallel NOR Flash
Erase Operations
The UNLOCK BYPASS CHIP ERASE command behaves the same way as the CHIP
ERASE command: the operation cannot be aborted, and a bus READ operation to the
memory outputs the status register.
BLOCK ERASE Command
The BLOCK ERASE (80/30h) command erases a list of one or more blocks. It sets all of
the bits in the unprotected selected blocks to 1. All previous data in the selected blocks
is lost.
Six bus WRITE operations are required to select the first block in the list. Each addition-
al block in the list can be selected by repeating the sixth bus WRITE operation using the
address of the additional block. After the command sequence is written, a block erase
timeout occurs. During the timeout period, additional block addresses and BLOCK
ERASE commands can be written. After the program/erase controller has started, it is
not possible to select any more blocks. Each additional block must therefore be selected
within the timeout period of the last block. The timeout timer restarts when an addi-
tional block is selected. After the sixth bus WRITE operation, a bus READ operation out-
puts the status register. See the WE#-Controlled Program waveforms for details on how
to identify if the program/erase controller has started the BLOCK ERASE operation.
After the BLOCK ERASE operation completes, the device returns to read mode, unless
an error has occurred. If an error occurs, bus READ operations will continue to output
the status register. A READ/RESET command must be issued to reset the error condi-
tion and return to read mode.
If any selected blocks are protected, they are ignored, and all the other selected blocks
are erased. If all of the selected blocks are protected, the BLOCK ERASE operation ap-
pears to start, but will terminate within approximately100 μ s, leaving the data un-
changed. No error condition is given when protected blocks are not erased.
During the BLOCK ERASE operation, the device ignores all commands except the
ERASE SUSPEND command and the READ/RESET command, which is accepted only
during the timeout period. The operation is aborted by performing a reset or powering-
down the device. In this case, data integrity cannot be ensured, and it is recommended
that the aborted blocks be erased again.
UNLOCK BYPASS BLOCK ERASE Command
When the device is in unlock bypass mode, the UNLOCK BYPASS BLOCK ERASE
(80/30h) command can be used to erase one or more memory blocks at a time. The
command requires two bus WRITE operations instead of six using the standard BLOCK
ERASE command. The final bus WRITE operation latches the address of the block and
starts the program/erase controller.
To erase multiple blocks (after the first two bus WRITE operations have selected the first
block in the list), each additional block in the list can be selected by repeating the sec-
ond bus WRITE operation using the address of the additional block.
The UNLOCK BYPASS BLOCK ERASE command behaves the same way as the BLOCK
ERASE command: the operation cannot be aborted, and a bus READ operation to the
memory outputs the status register. See the BLOCK ERASE Command section for de-
tails.
PDF: 09005aef849b4b09
m29ew_256mb_2gb.pdf - Rev. B 8/12 EN
34
Micron Technology, Inc. reserves the right to change products or specifications without notice.
? 2012 Micron Technology, Inc. All rights reserved.
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